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keysight m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming 500 msa/s, 16 bits, 2/4 channels data sheet
02 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet generate high-precision, complex, real-world signals the m3201a high-performance, high-bandwidth arbitrary waveform generator combines an advanced waveform generation system with embedded function generators and modulators (frequency/phase/amplitude) for broadband and if signal generation. performance meets simplicity thanks to easy-to-use programming libraries, real-time sequencing technology (hard virtual instrumentation or hvi technology), and graphical fpga programming technology. features 500 msa/s, 16 bits, 2/4 channels, 200 mhz bw (400 mhz iq) embedded advanced arbitrary waveform generators (awgs) C advanced triggering and marking (up to 8 reconfigurable i/os) C waveform queue system with cycles, delays and prescalers embedded high-precision function generators (fgs) C sinusoidal, triangular, square, dc, and more C 45-bit frequency resolution (up to ~ 5.68 hz) C 24-bit phase resolution (up to ~ 21.5 deg) embedded ultra-flexible amplitude and angle modulators high-quality output signal with low phase noise C sfdr: 64 dbc @80 mhz (typ.) C average noise density: down to C145 dbm/hz (typ.) optional features C simultaneous amplitude and angle modulations optional hw programming for high-performance applications C real-time sequencing (hvi technology) C fpga programming C xilinx kintex-7 325t or 410t fpga up to 2 gb of onboard ram (~ 1 gsamples) mechanical/interface C 1 slot 3u (pxie) C up to 1.6 gb/s transfer bw with p2p capabilities (pcie gen 2) C independent direct memory access (dma) channels for fast and efficient data transfer applications mimo, beam forming and other multi-channel coherent signal generation manufacturing in wireless devices, automated test equipment (ate) general purpose, rf/arbitrary waveform generation r&d/scientific research equipment, aerospace & defense (a/d)
03 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet programming technology and software tools software programming C easy-to-use native programming libraries for most common languages: c, c++, visual studio, labview, matlab, python, and more hardware programming (optional) C real-time sequencing (hard virtual instrumentation or hvi technology) C graphical flowchart-style m3601a design environment (-hv1 option required on hw) C ultra-fast, fully-parallelized, hard real-time execution C ultra-fast, time-deterministic decision-making C off-the-shelf inter-module synchronization & data exchange C fpga programming C graphical m3602a fpga design environment (-fp1 option required on hw) C no fpga know-how required C include from high-level to low-level design elements: off-the-shelf dsp blocks, matlab/ simulink designs, xilinx core generator ip cores, xilinx vivado/ise projects, vhdl or verilog code C ultra-fast, one-click compiling and on-the-fly programming no programming C ready-to-use sd1 spf (software front panels) pxie arbitrary waveform generators, digitizers and combination modules product type outputs (awgs) inputs (digitizers) speed (msa/s) bits ch bw (mhz) speed (msa/s) bits ch bw (mhz) m3202a awg 1000 14 2/4 dc-400 m3201a awg 500 16 2/4 dc-200 m3102a digitizer 500 14 2/4 dc-200 m3100a digitizer 100 14 4/8 dc-10 0 M3302A combo 500 16 2 dc-200 500 14 2 dc-200 m3300a combo 500 16 2/4 dc-200 100 14 4/8 dc-10 0
04 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet functional block diagram ordering information 1 product description m3201a pxi arbitrary waveform generator: 500 msa/s, 16 bits options description m3201a-ch2 / -ch4 two channels 2 / four channels m3201a-clv / -clf variable sampling clock 2 / fixed sampling clock, low jitter m3201a-dm1 dual modulation capability (amplitude and angle simultaneously) m3201a-m01 / -m12 / -m20 memory 16 mb, 8 msamples 2 / 128 mb, 60 msamples / 2 gb, 1 gsamples hw programming options description m3201a-hvi enabled hvi programming, requires an hvi design environment license (m3601a) m3201a-fp1 enabled fpga programming, requires -k32 or -k41 option and an fpga design environment license (m3602a) m3201a-k32 / -k41 fpga, xilinx 7k325t / 7k410t, required for -fp1 option only (needs memory option -m20) related software description m3601a hvi design environment m3602a fpga design environment 1. all options must be selected at time of purchase and are not upgradable 2. these options represent the standard configuration figure 1. m3201a output functional block diagram, all channels have identical output structure channel 1 channel x amplitude offset channel 1 output quadrature modulator iq lpf dac dual arbitrary waveform generator (awgx) function generator (fgx) angle modulator fm amplitude modulator am channel x output channel n output channel n dual modulation option only even channels only odd channels only phase frequency
05 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet technical specifications and characteristics general characteristics m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments inputs and outputs channels (single-ended mode) 2 4 out channels (differential mode) 1 2 out differential uses 2 channels reference clock 1 1 1 out reference clock 2 1 1 in triggers/markers 1, 3 1 1 in/out reconfigurable triggers/markers 2, 3 8 8 in/out reconfigurable output channels overview sampling rate 4 0.005 500 0.005 500 msa/s voltage resolution 16 16 bits output frequency dc 200 dc 200 mhz real-time bw 200 200 mhz output voltage C1.5 1.5 C1.5 1.5 volts built-in functionality function generators 2 4 1 per channel dual awgs 2 4 1 per channel iq modulators 2 4 1 per channel frequency modulators 2 4 1 per channel phase modulators 2 4 1 per channel amplitude modulators 2 4 1 per channel dc offset modulators 2 4 1 per channel onboard memory ram memory 16 2048 16 2048 mbytes 1. at front panel 2. at backplane 3. markers available from firmware version v3.0 or later 4. (-clv) option: dc to 500 msa/s; (-clf) option: fixed 500 msa/s
06 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet i/o specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments output channels sampling rate 1 0.005 500 0.005 500 msa/s output frequency dc 200 dc 200 mhz limited by a reconstruction filter output voltage C1.5 1.5 C1.5 1.5 volts on a 50 ? load source impedance 50 50 ? reference clock output frequency 10 or 100 10 or 100 mhz generated from the internal clock, user selectable voltage 800 800 mv pp on a 50 ? load power 2 2 dbm on a 50 ? load source impedance 50 50 ? ac coupled external i/o trigger/marker v ih 2 5 2 5 v v il 0 0.8 0 0.8 v v oh 2.4 3.3 2.4 3.3 v on a high z load v ol 0 0.5 0 0.5 v on a high z load input impedance 10 10 k ? source impedance ttl ttl speed 100 100 mhz 1. (-clv) option: dc to 500 msa/s; (-clf) option: fixed 500 msa/s
07 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet function generators (fgs) specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general specifications function generators 2 4 C 1 per channel waveform types 4 4 C sinusoidal, triangular, square and dc frequency range 0 200 0 200 mhz frequency resolution 45 45 bits frequency resolution 5.7 5.7 hz phase range 0 360 0 360 deg phase resolution 24 24 bits phase resolution 21.5 21.5 deg speed performance frequency change rate 100 100 mchanges/s with hvi technology frequency modulation rate 500 500 msamples/s with awgs and angle modulators phase change rate 100 100 mchanges/s with hvi technology phase modulation rate 500 500 msamples/s with awgs and angle modulators amplitude and offset specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general specifications amplitude / offset range C1.5 1.5 C1.5 1.5 volts amplitude + offset values amplitude / offset resolution 16 16 bits amplitude / offset resolution 45.8 45.8 v speed performance amplitude / offset change rate 500 500 mchanges/s with hvi technology amplitude / offset modulation rate 500 500 msamples/s with awgs and amplitude modulators
08 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet arbitrary waveform generators (awgs) specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general specifications dual awgs 2 4 1 dual awg per output channel aggregated speed (16 bits) 2000 4000 msa/s for all onboard waveforms combined aggregated speed (32 bits) 1000 2000 msa/s for all onboard waveforms combined waveform multiple 5 5 samples waveform length must be a multiple of this value 16-bit waveform length 15 957m 15 957m samples maximum depends on onboard ram 32-bit waveform length 10 478m 10 478m samples maximum depends on onboard ram waveform length efficiency 93.5 93.5 % effic. = waveform size / waveform size in ram trigger selec. selec. external trigger (input connector, backplane triggers), software trigger awg specifications (16-bit single waveform) speed 500 500 msa/s per awg resolution 16 16 bits awg destination selec. selec. amplitude, offset, frequency or phase awg specifications (16-bit dual waveform) speed (waveform a) 500 500 msa/s per awg speed (waveform b) 500 500 msa/s per awg resolution (waveform a) 16 16 bits resolution (waveform b) 16 16 bits awg destination (waveform a) selec. selec. amplitude, offset or i awg destination (waveform b) selec. selec. frequency, phase or q awg specifications (32-bit single waveform) speed 100 100 msa/s per awg, minimum prescaler: 1 resolution 32 32 bits awg destination selec. selec. amplitude, offset, frequency or phase awg specifications (32-bit dual waveform) speed (waveform a) 100 100 msa/s per awg, minimum prescaler: 1 speed (waveform b) 100 100 msa/s per awg, minimum prescaler: 1 resolution (waveform a) 32 32 bits resolution (waveform b) 32 32 bits awg destination (waveform a) selec. selec. amplitude or offset awg destination (waveform b) selec. selec. frequency or phase
09 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet angle modulators specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general specifications frequency modulators 2 4 1 per output channel phase modulators 2 4 1 per output channel carrier signal source fgs fgs table 3 on page 7 modulating signal source awgs awgs table 5 on page 8 frequency modulators (16-bit modulating waveform) deviation Cdev. gain +dev. gain Cdev. gain +dev. gain mhz modulating signal resolution 16 16 bits awg waveform modulating signal bw 0 250 0 250 mhz awg nyquist limit deviation gain 0 200 0 200 mhz deviation gain resolution 16 16 bits frequency modulators (32-bit modulating waveform) deviation Cdev. gain +dev. gain Cdev. gain +dev. gain mhz modulating signal resolution 32 32 bits awg waveform modulating signal bw 0 50 0 50 mhz awg nyquist limit deviation gain 0 200 0 200 mhz deviation gain resolution 16 16 bits phase modulators (16-bit modulating waveform) deviation Cdev. gain +dev. gain Cdev. gain +dev. gain deg modulating signal resolution 16 16 bits awg waveform modulating signal bw 0 250 0 250 mhz awg nyquist limit deviation gain 0 180 0 180 deg deviation gain resolution 16 16 bits ~ 5.5 mdeg phase modulators (32-bit modulating waveform) deviation Cdev. gain +dev. gain Cdev. gain +dev. gain deg modulating signal resolution 16 16 bits awg waveform is truncated modulating signal bw 0 50 0 50 mhz awg nyquist limit deviation gain 0 180 0 180 deg deviation gain resolution 16 16 bits ~ 5.5 mdeg
10 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet amplitude modulators specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general specifications amplitude modulators 2 4 1 per output channel offset modulators 2 4 1 per output channel carrier signal source fgs fgs table 3 on page 7 modulating signal source awgs awgs table 5 on page 8 amplitude & offset modulators (16-bit modulating waveform) deviation Cdev. gain +dev. gain Cdev. gain +dev. gain v p modulating signal resolution 16 16 bits awg waveform modulating signal bw 0 250 0 250 mhz awg nyquist limit deviation gain 0 1.5 0 1.5 v p deviation gain resolution 16 16 bits limited by the output dac amplitude & offset modulators (32-bit modulating waveform) deviation Cdev. gain +dev. gain Cdev. gain +dev. gain v p modulating signal resolution 16 16 bits awg waveform is truncated modulating signal bw 0 50 0 50 mhz awg nyquist limit deviation gain 0 1.5 0 1.5 v p deviation gain resolution 16 16 bits limited by the output dac
11 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet iq modulators specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general specifications iq modulators 2 4 1 per output channel carrier signal source fgs fgs table 3 on page 7 modulating signal source awgs awgs table 5 on page 8 amplitude deviation C1.5 C1.5 ?1.5 C1.5 v p phase deviation C180 180 C180 180 deg i modulating signal resolution 16 16 bits awg waveform i modulating signal bw 0 250 0 250 mhz awg nyquist limit q modulating signal resolution 16 16 bits awg waveform q modulating signal bw 0 250 0 250 mhz awg nyquist limit clock system specifications m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general specifications clock frequency 1 >10 0 500 >10 0 500 mhz 1. (-clv) option: 100 to 500 msa/s; (-clf) option: fixed 500 msa/s
12 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet ac performance m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments general characteristics analog output jitter <2 <2 ps rms (cycle-to-cycle) awg trigger to output jitter <2 <2 ps rms (cycle-to-cycle) for any trigger referenced to the chassis clock; indepen - dent of input trigger jitter if input jitter < 4ns peak-to-peak trigger resolution 10 10 ns channel-to-channel skew <20 <20 ps between ch 0 & ch 1, and ch 2 & ch 3 <50 <50 ps between any channel <150 <150 ps between modules, chassis dependent 2 clock output jitter <2 <2 ps rms (cycle-to-cycle) clock accuracy and stability 100 100 ppm pxie, cpxie versions; chassis dependent 1 ac characteristics spurious-free dynamic range (sfdr) p out = 0 dbm, measured from dc to max frequency f out = 10 mhz 68 68 dbc f out = 80 mhz 64 64 dbc f out = 120 mhz 57 57 dbc f out = 160 mhz 54 54 dbc crosstalk (adjacent channels) f out = 10 mhz 13 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet figure 2. single-tone spectrum @ f out = 10 mhz figure 3. single-tone spectrum @ f out = 80 mhz ac performance, typical
14 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet figure 5. single-tone spectrum @ f out = 160 mhz figure 4. single-tone spectrum @ f out = 120 mhz ac performance, typical
15 | keysight | m3201a pxie arbitrary waveform generator with optional real-time sequencing and fpga programming - data sheet system specifications environmental specifications (pxi express) m3201a-ch2 m3201a-ch4 parameter min typ max min typ max units comments system bus slots 1 1 slot pxi express (compactpci express compatible) pci express type gen 1 gen 2 gen 1 gen 2 C automatic gen negotiation, chassis dependent pci express link 1 4 1 4 lanes automatic lane negotiation, chassis dependent pci express speed 400 1600 400 1600 mbytes/s depends on # of lanes, chassis, congestion, and more sustainable throughput 200 800 200 800 mpoints/s depends on # of lanes, chassis, congestion, and more power and temperature 3.3 v pxie power supply 1.5 1.5 a ~ 5 w 12 v pxie power supply 2 2 a ~ 24 w environmental 1 temperature range operating non-operating 0 to +55c (10,000 feet) -40 to +70 c (up to 15,000 feet) max operative altitude 4000 m (10,000 feet) operating humidity range (%rh) 10 to 95% at 40 c non-operating humidity range (%rh): 5 to 95 5 to 95% calibration interval 1 year emc complies with european emc directive C iec/en 61326-1 C cispr pub 11 group 1, class a this ism device is in compliance with canadian ices-001 cet appareil ism est conforme la norme nmb-001 du canada. this ism device is in compliance with australian and new zealand rcm this ism device is in compliance with south korea emc kcc 1. samples of this product have been type tested in accordance with the keysight environmental test manual and verified to be robust against the environ - mental stresses of storage, transportation and end-use; those stresses include but are not limited to temperature, humidity, shock, vibration, altitude and power line conditions. test methods are aligned with iec 60068-2 and levels are similar to mil-prf-28800f class 3.
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